Việc làm {key1} tại {key2} - ViecOi.vn

HCL GUVI
Liên hệ:
Rithanya Venkatessan
Loại hình:
Liên doanh
Quy mô:
500 - 999 người
Trụ sở:
Khác
Địa chỉ:
IITM Research park - phase 2, module #9, 3rd floor, D block, Kanagam Rd, Tharamani, Chennai, Tamil

VIỆC LÀM ASIC DESIGN AND VERIFICATION MENTOR

Lương: 4,500,000 - 7,000,000 VNĐ
Tiền thưởng: 0 VNĐ

Thông tin tuyển dụng

Điều kiện làm việc

  • Số lượng cần tuyển: 5 người
  • Bằng cấp: Trên đại học
  • Kinh nghiệm làm việc: Từ 5 đến 8 năm cho vị trí tương đương
  • Giới tính: Không yêu cầu
  • Cấp bậc: Quản Lý

Mô tả công việc

    JOB SUMMARY:

    This is a Freelance Part Time Job- For Mentoring- Pay is based on session based. We are seeking a highly skilled and motivated ASIC Design and Verification Engineer to join our dynamic team. The successful candidate will be responsible for designing, implementing, and verifying complex ASIC designs for cutting-edge semiconductor products.


    RESPONSIBILITIES:

    • Architect and implement digital ASIC designs meeting performance, power, and area requirements.
    • Develop and execute verification plans using industry-standard methodologies such as UVM (Universal Verification Methodology).
    • Write and debug RTL (Register Transfer Level) code in Verilog/SystemVerilog.
    • Create and maintain verification environments, including testbenches, models, and functional coverage.
    • Collaborate with cross-functional teams including physical design, software, and validation to ensure successful tape-out.
    • Analyze and debug simulation failures and work closely with design teams to resolve issues.
    • Participate in design reviews, providing feedback and guidance to improve design quality and efficiency.
    • Stay current with industry trends and advancements in ASIC design and verification methodologies.

    REQUIREMENTS:

    • Bachelor's/Master's degree in Electrical Engineering, Computer Engineering, or related field.
    • Solid understanding of digital design fundamentals and ASIC design flow.
    • Proficiency in Verilog/SystemVerilog and experience with ASIC design tools Synopsys).
    • Familiarity with verification methodologies such as UVM and scripting languages (e.g., Perl, Python).
    • Experience with FPGA prototyping and emulation platforms is a plus.
    • Strong analytical and problem-solving skills.
    • Excellent communication and teamwork abilities.
    • Ability to thrive in a fast-paced, dynamic environment.

    BENEFITS:

  • You will receive the following benefits: được làm việc tại nhà.